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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 5208838 B1

PDFFull Text
Date of Patent:
May. 04, 1993

Filed:

Mar. 30, 1990

Clock signal multiplier

Applicant:
Inventors:

Dennis L Wendell, Puyallup, WA (US);

Charles Hochstedler, Puyallup, WA (US);

Dan Lunecki, Puyallup, WA (US);

Terry L Lyon, Roseville, MN (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorneys:

Rappaport; Irving S.

Colwell; Robert C.

Hughes; Richard L.

Primary Examiner:

Stephen Chin

Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375106 ; 328 381 ;
Abstract

A clock multiplier is selectable to provide either an unmultiplied input clock to the internal clock line or a multiplied clock signal, depending upon the state of a test mode input signal. By providing the circuitry on a integrated circuit chip, the chip can be driven at its normal operating frequency using lower-frequency test equipment. One multiplier device includes a plurality of series-connected one-shots.

Find Patent Forward Citations

Wendell, Dennis. (1993). Clock signal multiplier (U.S. Patent No. 5208838). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5208838

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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