The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1993

Filed:

Jan. 22, 1992
Applicant:
Inventor:

Hiroaki Nishimori, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
3241 / ; 324 731 ; 371 151 ;
Abstract

A semiconductor integrated circuit provided with a test circuit for testing an output buffer (11) is disclosed. The test circuit is capable of transmitting a logic signal supplied from an internal circuit in a shorter transmission time than a conventional test circuit. Essential parts of the test circuit include a three-state input buffer (13) and a three-state buffer (14). In the test mode, buffer (14) takes a high-impedance state and buffer (13) transmits a test data signal (TSTD) supplied from an external circuit to output buffer (11) to be tested. In the output mode, buffer (13) takes a high-impedance state and buffer (14) transmits a logic signal supplied from an internal logic circuit to an external circuit through output buffer (11).


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