The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1993

Filed:

Feb. 10, 1992
Applicant:
Inventors:

Shin-ichi Imai, Yokohama, JP;

Akira Sakata, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307540 ; 307562 ; 307362 ;
Abstract

In a clamping circuit comprising a voltage comparator for comparing an input signal voltage supplied to the signal input terminal and a reference voltage, a clamping circuit of the present invention comprises a bias voltage supplying circuit and a switch circuit inserted between the bias voltage supplying circuit and the signal input terminal. The input signal voltage is compared with the reference voltage by the voltage comparator, and the switch circuit is ON/OFF-controlled on the basis of the comparison result. When the switch circuit is enabled, a bias voltage supplying circuit is supplied to the signal input terminal, and the input signal voltage is clamped at a voltage equal to the reference voltage. When the switch circuit comprises a CMOS transfer gate, a voltage drop does not occur across the switch circuit regardless of the value of the bias voltage.


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