The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 27, 1993

Filed:

May. 09, 1991
Applicant:
Inventors:

Claudio de Sa e Silva, Lynnwood, WA (US);

Jeffrey D Putsch, Milford, NH (US);

Varnum S Holland, Amherst, NH (US);

Wilburn M Miller, Wilton, NH (US);

Assignee:

Unitrode Corporation, Billerica, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; G05F / ;
U.S. Cl.
CPC ...
307127 ; 307571 ; 307592 ; 323290 ; 361245 ; 361 82 ; 361153 ;
Abstract

A transformer isolated circuit for driving a semiconductor power switch includes a transformer which is driven with a high frequency Pulse Width Modulated (PWM) signal in such a way that the constantly present PWM carrier supplies the power needed for high gate current pulses, while different duty cycles determine the 'on' or 'off' state of the power device under control. Transformer saturation is prevented by sensing primary current and returning it to zero once per PWM cycle. Because of the high PWM carrier frequency used, the average transformer power is low, yet the secondary side is able to deliver high pulse currents for fast 'on-off' switching of the gate of even the largest N- or P-channel device, without need for auxiliary power supplies. Also included are provisions for extremely fast output current limiting, for use where short circuit protection is necessary. Discussion of a monolithic implementation is included.


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