The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 20, 1993

Filed:

Aug. 07, 1990
Applicant:
Inventor:

Tsunenori Umeki, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523003 ; 360 51 ;
Abstract

An AND type read-only memory (D-A-ROM), includes a memory unit divided into blocks in a row direction and into sub-blocks a column direction, a Y decoder, an X decoder and a column selector. An output of the Y decoder and an output of the X decoder are connected to the memory blocks by first and second gate electrode connectors, respectively. A read control signal from the CPU is connected to each of the memory blocks by third gate electrode connectors. In addition, the output of the X decoder is supplied in parallel to each of the memory sub-blocks through bypass connectors including aluminum interconnections of a separately formed second layer. The read control signal is supplied in parallel to each of the memory sub-blocks through bypass interconnections of the second layer.


Find Patent Forward Citations

Umeki, Tsunenori. (1993). Semiconductor memory with memory unit comprising a plurality of memory (U.S. Patent No. 5204842). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5204842

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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