Time base correcting apparatus with means for inhibiting memory write

Abstract

In a time base correcting apparatus having a memory for storing a reproduced video signal reproduced by a rotary magnetic head from slant tracks on a magnetic tape which is transported at a desired tape running speed that may be different from a tape running speed used when recording the video signal on the tape, a write in-line address counter for generating a write in-line address signal and a write line address counter for generating a write line address signal supplied to the memory, a write clock signal generating circuit for generating a write in-line address increment clock signal and a write line address increment clock signal which are each synchronized with a reproduced horizontal synchronizing signal separated from the reproduced video signal, and which are supplied to the write in-line address counter and the write line address counter, a read in-line address counter for generating a read in-line address signal and a read line address counter for generating a read line address signal supplied to the memory, and a read clock signal generating circuit for generating a read in-line address increment clock signal and a read line address increment clock signal which are each synchronized with a reference horizontal synchronizing signal, and which are supplied to the read in-line address counter and to the read line address counter: periodically recurring signal sequences which are respectively synchronized with the reproduced horizontal synchronizing signal and the reference horizontal synchronizing signal, are generated, coincidence of a signal in one of the sequences with a corresponding signal in the other of the sequences is detected, and, in response to such detection, changing of one of the write line address signal and the read line address signal from the address counter and the read line address counter respectively, is inhibited.