The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 1993

Filed:

Jan. 10, 1992
Applicant:
Inventors:

John M Lenthall, Galway, IE;

Neal A Crook, Reading, GB;

Helen C McGreal, Galway, IE;

Michael J Seaman, San Jose, CA (US);

Assignee:

Digital Equipment Corporation, Maynard, MA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395725 ; 3642426 ; 3642412 ; 364D / ; 36494191 ; 364D / ;
Abstract

An access request prioritization and summary device for determining the current highest priority among n entities. The device includes a bitmap having n bit storage locations. Each one of the n bit storage locations corresponds to one of the entities and is used to store a value which represents when the corresponding entity is available for prioritization. A plurality of combinational logic blocks are connected to the bitmap so that each one of the combinational logic blocks receives a preselected portion of the values stored in the n bit storage locations of the bitmap. Each one of the combinational logic blocks has a token signal input and a token signal output. The token signal inputs and outputs are coupled together to form a series of token signal links between the combinational logic blocks. When certain preselected highest priority determination conditions occur within one of the combinational logic blocks, the combinational logic block generates a token signal which serves as the token signal to the respective succeeding combinational logic block. Each combinational logic block is capable of receiving a token signal from the previous combinational logic block and is responsive to the input of a token signal to determine a current highest priority from the values which it received as input signals.


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