The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 13, 1993

Filed:

Mar. 28, 1990
Applicant:
Inventor:

Kazuaki Ochiai, Tenri, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
371 212 ; 371 211 ; 371 151 ; 371-3 ;
Abstract

A semiconductor memory device has a multibit parallel test function and a method of testing such a memory device. The memory device comprises a multibit parallel writing circuit (2) and a multibit parallel check circuit (3). The method comprises the steps of: inputting test data into a memory unit through an input (4) while setting the multibit parallel writing circuit (2) to the ON state by a control circuit; reading out the multibit test data from the memory unit, while setting the multibit parallel check circuit (3) to the OFF state, thereby conducting the test of the multibit parallel writing circuit (2) inputting multibit test data into the memory unit through the input, while setting the multibit parallel writing circuit (2) to the OFF state by the control circuit; and reading out the multibit test data from the memory unit, while setting the multibit parallel check circuit (3) to the ON state, thereby conducting the test of said multibit parallel check circuit (3).


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