Dynamic semiconductor memory device

Abstract

A dynamic random access memory comprises a substrate, a transfer transistor provided on the substrate, a memory cell capacitor provided on the substrate in contact with a first diffusion region formed in the substrate, a first conductor pattern provided on the substrate to extend in a first direction as a word line, a first insulator layer provided on the substrate to bury the memory cell capacitor and the first conductor pattern, a first contact hole provided on the first insulator layer to expose a second diffusion region formed in the substrate, a second conductor pattern provided on the first insulator layer to extend in a second direction, passing above the memory cell capacitor and making a contact with the second diffusion region at the first contact hole, a second insulator layer provided on the second conductor pattern, a second contact hole provided on the second insulator layer at a part thereof that locates above the memory cell capacitor to expose the upper major surface of the second conductor pattern, and a third conductor pattern provided on the second insulator layer to extend in the second direction substantially coincident with the first conductor pattern as a bit line of the dynamic random access memory, wherein the third conductor pattern makes a contact with the second conductor pattern at the second contact hole.