The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 06, 1993

Filed:

Oct. 31, 1989
Applicant:
Inventors:

Tomohisa Kohiyama, Yokohama, JP;

Shigeru Murasaki, Narashino, JP;

Yukihiro Seki, Yokohama, JP;

Yoshiaki Kitazume, Sayama, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
395164 ; 3649272 ; 3649397 ; 36496431 ; 364D / ; 395425 ; 395725 ;
Abstract

A display system uses a dual-port memory having a random access memory part and a serial access memory part as a frame buffer. Display data is transferred from the random access memory part to the serial access memory part in response to a timing signal of the data transfer. Just prior to the timing signal, an access start disable signal is generated, which has an active period being equal to or longer than an access cycle time of drawing data. When the access start disable signal is active, a draw access from a central processing unit, etc. to the dual port memory becomes disable. Further, address bits for a column of the memory are detected to become all zero and a predetermined value, so that the timing of a real time data transfer and the access start disable signal for the real time data transfer can be generated.


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