The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 06, 1993
Filed:
Jun. 21, 1991
David Moloney, Cornaredo, IT;
Gianfranco Vai, Pavia, IT;
Maurizio Zuffada, Milan, IT;
Giorgio Betti, Milan, IT;
Abstract
The tristate output gate structure particularly for CMOS integrated circuits, comprises an enable terminal receiving an enable signal and an input terminal receiving an input signal, which connects, through signal switching means, an output terminal to a positive power supply terminal or to a negative power supply terminal. The enable terminal can be electrically connected to the gate terminal of a first P-channel transistor through signal inverting means and to the gate terminal of a second N-channel transistor. The output terminal is electrically connected to the drain terminals of the first and second transistors. The first and second transistors electrically insulate the output terminal from the input terminal.