The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1993
Filed:
Nov. 08, 1991
Kenji Natori, Kawasaki, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A nonvolatile semiconductor memory including multiple memory cells. Each memory cell comprises a FET TM having a ferroelectric insulation film and two MOS transistors T1 and T2 connected in series to the ends of the source-drain path of the FET, respectively. To write data into a memory cell, an electric field is applied in a predetermined direction between the gate and the substrate of the transistor TM. The electric field polarizes the gate insulation film of the transistor TM, which is made of ferroelectric material, in the direction, thereby writing data into the memory cell. In a data read mode, if the transistor TM is on, a current flows through the transistor TM, and the potential of a bit line to which the transistor TM is coupled decreases. In contrast, if the transistor TM is off, no currents flow through this transistor TM, and the potential of the bit line to which the transistor TM is coupled remains unchanged. Thus, the data stored n the memory cell can be discriminated by detecting whether the potential of the bit line corresponds to a '1' bit or a '0' bit.