The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 30, 1993
Filed:
Mar. 27, 1992
Ronald V Davidge, Coral Springs, FL (US);
Todd A McClurg, Boca Raton, FL (US);
Jay H Neer, Boca Raton, FL (US);
Darryl C Newell, Boca Raton, FL (US);
Heinz Piorunneck, Trumbull, CT (US);
Rocco J Noschese, Wilton, CT (US);
Ronald P Sidor, Stratford, CT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
An electronic connector is configured to removably receive either a circuit card of a first type, having one row of contacts per side, on an insertion tab adjacent to an insertion edge, or a circuit card of a second type, having two rows of contacts per side. Two rows of spring contacts are provided for this purpose on each side of a central card-receiving slot. Interposing means are also provided to prevent contact between a daughter card of the first type fully inserted in this slot and one of these rows on each side. These interposing means may consist of a slotted interposer structure slid over a portion of the insertion tab of the card, or alternately of a pair of pivotable interposers mounted along the length of the connector, to be pivoted by sections of daughter cards of the first type so that vanes extending from these interposers will push these springs away from the card. An electronic device, such as a connector of this type, includes solder tails for attachment within holes of a mother board, aligned in several parallel rows. Individual solder tails in each row are displaced by a first distance. Individual solder tails in adjacent rows are displaced by a second distance, which is a submultiple of the first distance less than half the first distance. This second distance may also be a multiple of the first distance divided by the number of rows.