The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 16, 1993

Filed:

Aug. 20, 1990
Applicant:
Inventors:

Ken W Hsu, Pittsford, NY (US);

Lionel J D'Luna, Rochester, NY (US);

Hur Jay Yeh, Rochester, NY (US);

Glen W Brown, Fairport, NY (US);

Assignee:

Eastman Kodak Company, Rochester, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
36472801 ; 364754 ;
Abstract

An integrated circuit that uses the same coefficient registers, multipliers and adders to perform both matrix multiplication and convolution operations. The multipliers are arranged in columns and rows with the matrix multiplication adders located in the corresponding columns and with the adder for producing the convolution output located in one of the columns. A mode selection switch causes the multiplexers to change input data routing based on the mode selected. The circuit allows loading of all the coefficients or selection of hardwired coefficients. By rerouting the inputs of the multipliers using the multiplexers, the circuit can be easily configured for either mode of operation. The outputs corresponding to the columns are either output directly during matrix multiplication or provided to the convolution adder. The provision of an internal pseudo random number generator, serial inputs and outputs for test data and a signature analysis signal generating circuit allows the circuit to be easily internally tested.


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