The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 1993
Filed:
Jun. 10, 1992
Robert E Strout, II, Livermore, CA (US);
George A Spix, Eau Claire, WI (US);
Edward C Miller, Eau Claire, WI (US);
Anthony R Schooler, Eau Claire, WI (US);
Alexander A Silbey, Eau Claire, WI (US);
Andrew E Phelps, Eau Claire, WI (US);
Brian D Vanderwarn, Eau Claire, WI (US);
Gregory G Gaertner, Eau Claire, WI (US);
Supercomputer Systems Limited Partnership, Eau Claire, WI (US);
Abstract
A fast interrupt mechanism is capable of simultaneously interrupting a community of associated processors in a multiprocessor system. The fast interrupt mechanism enables the more effective debugging of software executing on a multiprocessor system by allowing all of the processors in a community associated with a parallel process to be halted within a limited number of clock cycles following a hardware exception or processor breakpoint. The fast interrupt mechanism consists of a set of registers that are used to identify associations among multiple processors, a comparison matrix that is used to select processors to be interrupted, a network of interconnections that transmit interrupt events to and from the processors, and elements in the processors that create and respond to fast interrupt events.