The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 09, 1993
Filed:
Dec. 17, 1990
Applicant:
Inventors:
Emel S Bulat, Framingham, MA (US);
Maureen Sullivan, Framingham, MA (US);
Assignee:
GTE Laboratories Incorporated, Waltham, MA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
437 41 ; 437911 ; 437978 ;
Abstract
Method of fabricating a junction field effect transistor employing self-alignment techniques. The active regions of the device are defined by a relatively thin thermally-grown isolating silicon oxide layer at the surface of a silicon body. After the active source and gate regions of the device as defined by the thermally-grown isolatign silicon oxide are formed in the silicon, a layer of deposited silicon oxide is formed over the thermally-grown silicon oxide. This method provides a thick dielectric layer as well as control of the horizontal dimensions of the source and gate contacts.