The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 1993

Filed:

Jun. 21, 1991
Applicant:
Inventors:

Peter Flamm, March, DE;

Martin Winterer, Gundelfingen, DE;

Hans-Juergen Desor, Gundelfingen, DE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N / ;
U.S. Cl.
CPC ...
358158 ; 358148 ;
Abstract

A digital phase-locked loop has a periodically overflowing digital oscillator (DCO), implemented as a modulo adder, and a processor device. The processor device adjusts the period T of the digital oscillator to a nominal period, determined from periodically occurring synchronizing pulses, by comparing the actual phase of the digital oscillator with a set phase at the control clock rate of the periodic synchronizing pulses. After the digital oscillator has been locked to the nominal period, the processor device compares the phases by using a double-frequency signal sequence of one-half line period derived from the digital oscillator output signal. The DCO output signal is fed to a correction device where an address-phase signal, locked to the DCO output signal, is generated so that when a non-periodic synchronizing pulse occurs, the address-phase signal is shifted by one period of the signal sequence of one-half line period with respect to the digital oscillator output signal.


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