The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 05, 1993
Filed:
Jun. 03, 1991
Bruce M Holland, Boulder, CO (US);
Gary L Bliss, Westminster, CO (US);
Spectralink Corporation, Boulder, CO (US);
Abstract
A unique method and system is disclosed for generating digital clock timing in a receiver for use in direct-sequence spread-spectrum digital communication systems wherein spread data is delivered from a transmitter to a receiver. The present invention provides at the transmitter frames of digital communication data with each frame having a plurality of time slots and with each time slot having a plurality of digital bits. The transmitter utilizes direct-sequence spreading codes for spreading the digital bits in the time frame. The direct sequence spreading codes each have the same fixed sequence length of M chips and, furthermore, the number of chips per bit CB to spread each digital bit is constant and fully aligned with each digital bit. The ration of M:CB is an integer and the ratio of time of each time slot to the time of the M chips also equals an integer. The spread frames of digital information are despread at the receiver with receiver provided identical direct-sequence codes. The digital clock timing is generated from the receiver's pseudo random sequence generator. Bit timing equals CB*8, nibble timing equals 4*CB, and byte timing equals CB.