The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 1993

Filed:

May. 15, 1991
Applicant:
Inventors:

Hiroyuki Mathuda, Kawasaki, JP;

Shinzou Satou, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307446 ; 307443 ; 307570 ;
Abstract

A Bi-CMOS circuit includes a bipolar output stage and a CMOS circuit. The bipolar output stage includes pull-up and pull-down transistors which form an output end. The CMOS circuit receives an input signal and generates a signal for driving the output stage. The CMOS circuit comprises a CMOS inverter for receiving the input signal, a p-channel MOS transistor for driving the pull-up transistor of the bipolar output stage based on the input signal, an n-channel MOS transistor for driving the pull-down transistors of the bipolar output stage based on the input signal, a p-channel MOS transistor for discharging a base of the pull-up transistor based on an output of the CMOS inverter, and an n-channel MOS transistor for discharging a base of the pull-down transistor based on an output of the CMOS inverter.


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