The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1992

Filed:

Oct. 08, 1991
Applicant:
Inventor:

Koichi Yokomizo, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
377 47 ; 377 28 ; 377114 ; 3072471 ;
Abstract

A first frequency dividing circuit receives an input clock signal from an input terminal and divides the frequency of the input clock signal to produce a first signal which it supplies to an output terminal. A second frequency dividing circuit divides the frequency of the input clock signal to produce a second signal having the same frequency as the first signal but differing from the first signal in phase. The second signal controls a gating circuit. When switched on, the gating circuit connects the output terminal to the input terminal, or to an auxiliary power-supply or ground terminal, thereby deskewing the signal at the output terminal.


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Yokomizo, Koichi. (1992). Frequency divider with reduced clock skew (U.S. Patent No. 5175752). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5175752

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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