The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 1992

Filed:

Aug. 30, 1991
Applicant:
Inventor:

Daniel Ballatore, Gourdon, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03D / ;
U.S. Cl.
CPC ...
307526 ; 307522 ; 307523 ; 328134 ; 328141 ;
Abstract

A clock frequency tester circuit for determining whether the frequency of a clock (FB) is comprised within a predetermined range (FA-FA/n, FA+FA/n) centered around a reference frequency (FA), is described. The clock frequency tester circuit includes a frequency mixer which provides an output frequency FQ in accordance with the relation: FQ=absolute value of (FA-FB), for a frequency FB close to FA, and a divide-by-n circuit which divides the frequency FB of the clock to be tested. The frequency tester further includes a phase frequency comparator which has a first and second input lead F1 and F2 which are, respectively, connected to the output of the divide-by-n circuit and to the output of the frequency mixer. The phase frequency comparator generates an output signal Q2 which remains at a steady level whenever F1 input signal has a frequency which is higher than that of the input signal F2, i.e., when the frequency FB to be tested is comprised within the range (FA-FA/n, FA+FA/n) (for a frequency FB close to FA). Since the factor n can be easily adjusted, any desired degree of accuracy can be provided by the frequency tester circuit disclosed.


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