The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 22, 1992
Filed:
Aug. 15, 1991
Frederick H Lindner, Canaan, NH (US);
Paul A Duncanson, Franklin, NH (US);
Direct Imaging Inc., West Lebanon, NH (US);
Abstract
A multi-layer rigid prototype printed circuit board is fabricated by applying a heat activated, rapid setting or tacking melt-remelt adhesive utilizing a moderate temperature heat laminating device onto appropriate surfaces of pre-etched and plated insulative film based, flexible film layers. A computer guided drill drills through-holes within an electrical insulative material planar substrate core using prescribed drill sizes for each through-hole pin size desired for a given hole location. The etched layers with the adhesive applied are positioned in proper sequence aligned to the drilled hole pattern and heat laminated thereto as a stacked array on the top and/or bottom surfaces of the substrate core. Computer guided drilling of the adhered films with prescribed smaller drill sizes at each through-hole location is effected to create film cantilever portions extending radially outwardly of the edge of the through-holes. Unique, polygonal or like cross-section through-hole connector pins are inserted into the aligned holes within the flexible film layers and the substrate, with the pins having at least one radial projection forming a sharp corner which cuts into the conductor tracks of the multi-layer flexible film array to deflect and deform the cantilever edge portion of the multi-layer flexible films into the substrate through-holes for effecting a low impedance conductor track to pin to conductor track electrical connection for a plurality of the films. The conductor tracks at the cantilever edge portions may be provided with a solder film and heat applied by post-heating the through-hole connector pins or otherwise to facilitate a low impedance connection between the periphery of the through-hole connector pin and the conductor tracks of the multi-layer flexible film array. The application of heat remelts the adhesive facilitating flexing of the multi-layer flexible films and ensuring contact between the conductor tracks and the pin periphery.