The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 1992
Filed:
Jun. 30, 1989
Dale H Leuthold, Saratoga, CA (US);
Paul M Guglielmi, Westboro, MA (US);
Digital Equipment Corporation, Maynard, MA (US);
Abstract
Latch circuit and method which permit two-phase latches and flip-flops to be intermixed in a system having level sensitive scanning without critical clock requirements. The circuit includes a master latch having a normal data input and a scan data input, and a slave latch connected to the master latch. A differential pair of clock signals is applied to the latches in a complementary manner during a normal mode of operation to load data from the normal data input to the master latch and to transfer the normal data from the master latch to the slave latch, and two separate low frequency non-overlapping scan clock phases are applied to the latches during a level sensitive scanning mode to load data from the scan data input to the master latch and to transfer the scan data from the master latch to the slave latch.