The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 1992
Filed:
Jul. 12, 1991
Masato Nagamatsu, Kawasaki, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
A method for forming in a short time master-slice integrated circuits of high reliability, which circuits comprise diffusion layers and polysilicon layers which form transistor elements, and a plurality of metal wiring layers formed for realizing desired circuits, with insulating layers interposed between every adjacent two of the wiring layers. The methods comprises a first wiring process in which a master slice is provided by forming a predetermined number of metal layers in a wafer, and a second wiring process in which further metal wiring layers, to be customized so as to have logical functions required by a user, are formed on the first-mentioned metal wiring layers. The inner-most metal wiring layer of all the metal layers is used as wide power source line which is almost free from electro or stress migration.