The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 1992

Filed:

Oct. 22, 1990
Applicant:
Inventors:

Kelvin K Hsueh, Pocatello, ID (US);

Brian R Kauffmann, Pocatello, ID (US);

Gerardus F Riebeek, Pocatello, ID (US);

Assignee:

Gould Inc., Eastlake, OH (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307451 ; 307264 ; 307570 ; 307270 ; 330264 ;
Abstract

A highly stable high-voltage output buffer is provided which may be manufactured using standard CMOS technology. As part of the invention, the effects of voltage drift at one or more of the nodes formed between series connected P or N-channel MOSFET devices are generally reduced or eliminated. The present invention includes compensation circuitry which reduces the effects of parasitic coupling within the MOSFET devices, and which serves to compensate for any voltage drift which may occur at the nodes between series connected devices. In addition, the present invention provides a method and apparatus for increasing the current sourcing capability of a CMOS high-voltage output buffer, even under low supply V.sub.vf conditions, without necessarily increasing the size of the output device. Furthermore, the present invention provides a method and apparatus for reducing the effects of coupling along a shared bias line between a plurality of high-voltage output buffers in accordance with the present invention.


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