Instruction prefetching device having a history table for memorizing

Abstract

In an instruction prefetching device for use in a data processing system, a history table (26) serves not only as a branch history table for memorizing branch predictions but also as a page-over history table for memorizing page-over information. Even when a prefetch real instruction address coincides in an instruction address register 23 with one of page last real instruction addresses, the history table produces a table hit signal and a page-over real instruction address which corresponds to the prefetch real instruction address in the page-over information kept in the history table. Responsive to the table hit signal, an instruction prefetch control circuit (28) supplies, in cooperation with a request address selector (24), the instruction address register with the page-over real instruction address as a next succeeding real instruction address which next follows the prefetch real instruction address to make an instruction memory circuit (21) produce a page-over instruction addressed by the page-over real instruction address.