The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 1992
Filed:
Oct. 16, 1991
Stephen T Radack, Jr, Erie, PA (US);
General Electric Company, Erie, PA (US);
Abstract
A mounting arrangement for a pair of relatively high voltage, press-pack semiconductors positioned in spaced apart relationship on a support surface of a heat sink comprises an enclosure formed of electrically insulative material having a mounting surface mating with the heat sink support surface. The arrangement has a pair of spaced openings extending through the mounting surface, each of which is configured for relatively accurately positioning a respective one of the semiconductors. A groove circumscribes each opening with a third groove spaced from and circumscribing the pair of grooves on the mounting surface. An O-ring in each groove defines an area between the grooves isolated from environmental contaminants when the enclosure is clamped to the heat sink. An electrically conductive mounting plate is positioned in each opening and electrically insulated from the heat sink but electrically connected to a respective semiconductor. A relatively stiff spring bar extends between the semiconductors with opposite ends of the bar supported upon a respective one of the semiconductors. The heat sink and the bar are coupled tensioning the bar toward the heat sink compressing the semiconductors between ends of the bar and the heat sink. The tensioning device comprises a bolt extending through an aperture in the heat sink, the enclosure mounting surface, and the bar between the semiconductors. Another groove circumscribes the aperture in the enclosure mounting surface and an O-ring positioned therein environmentally isolating the aperture from the area between the grooves when the enclosure is affixed to the heat sink.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile