The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 01, 1992
Filed:
Feb. 11, 1991
Applicant:
Inventor:
Kazuya Maeshima, Nagasaki, JP;
Assignee:
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04N / ;
U.S. Cl.
CPC ...
358148 ; 358158 ;
Abstract
A sampling clock generating circuit generates a sampling clock which is used for the A-D conversion of a video signal. A master clock produced by a frequency synthesizer is demultiplied in frequency at dividing ratio N.sub.S by a programmable frequency demultiplier which is reset by the horizontal sync signal. The resulting sampling clock can have one of various frequencies depending on the combination of the frequency dividing ratio N.sub.M of the frequency synthesizer and the frequency dividing ratio N.sub.S of the programmable frequency demultiplier, so that it is fit for various video signals.