The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 24, 1992
Filed:
Jun. 28, 1991
Applicant:
Inventor:
Takashi Makino, Tokyo, JP;
Assignee:
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Primary Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ;
U.S. Cl.
CPC ...
36472416 ; 364758 ;
Abstract
Tap arithmetic units and first delay circuits are arranged alternately. Each of the tap arithmetic units has a full-adder array for multiplying an input signal which has been sampled at regular intervals and coefficients, a second pipeline delay circuit for delaying outputs of the full-adder array by a predetermined time and an adder circuit for adding outputs of the second delay circuits. The first and second delay circuits are timed to the preceding tap arithmetic unit for arithmetic operations. The use of the second delay circuit for the timing of arithmetic operations permits the arrangement of the first delay circuit to be simplified.