The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 24, 1992

Filed:

Jun. 05, 1991
Applicant:
Inventors:

Jacquelin Babakanian, Palm Beach, FL (US);

James W Davis, Palm Beach, FL (US);

Mark S Garvin, Palm Beach, FL (US);

Kim P Liew, Palm Beach, FL (US);

Yoav Medan, Haifa, IT;

Nandor G Thoma, Palm Beach, FL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H03K / ;
U.S. Cl.
CPC ...
3073032 ; 3074651 ; 307469 ; 307451 ;
Abstract

A basic tree construction, from which differential cascode voltage switch (DCVS) circuits having variable logic personality can be formed, contains n (>2) rows of differentially associated semiconductor device pairs spanned by n pairs of complementary input conductor leads, and a load circuit coupled to drain terminals of devices in the nth row. The nth row contains 2 device pairs and each other row contains 2.sup.i-1 device pairs (i=1, 2, . . . , n-1). Connections between source and drain terminals of devices in successive rows are predefined from the 1st to the n-1st row and variably definable between the n-1st and nth rows. Connections between input conductors and device gate terminals are predefined in each row other than the nth row, and variably definable in the nth row. Upon selectively defining a set of variable connections relative to the n-1st and nth rows the logic personality of the tree is selected to conform to any one of all possible functions of n variables. Logic function personalization is established in one embodiment by altering materials at discrete points in a space between n-1st and nth rows. In another embodiment, personalization is established by altering signals stored by latch devices in the space between the n-1st and nth rows which control gating device adjacently positioned to form conductive connections corresponding to those formed by altering materials in the first embodiment.


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