Logic circuit including input and output registers with data bypass and

Abstract

A logic circuit comprises an input register for holding data to be computed, a computation circuit for computationally processing the data inputted from the input register to output the computationally processed result, and an output register for holding the computationally processed result outputted from the computation circuit, characterized in that the computation circuit includes computational data pass device for passing input data therethrough as it is without applying computation processing thereto, thus permitting data held in the input register to pass through the computation circuit and be inputted to the output register as it is. By simply varying the control inputs to the register and the computation circuit, it is possible to read data from an arbitrary register or write it thereinto. This easily gives a test without practically increasing an amount of wiring. Random access to each register can be performed without newly providing data bus or selector in a circuit in which registers and arithmetic and logic means are mixedly provided.