The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 17, 1992

Filed:

Feb. 19, 1991
Applicant:
Inventors:

Hiroji Ozaki, Hyogo, JP;

Shinichi Satoh, Hyogo, JP;

Takahisa Eimori, Hyogo, JP;

Wataru Wakamiya, Hyogo, JP;

Yoshinori Tanaka, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257372 ; 257394 ; 257630 ;
Abstract

A semiconductor device comprises an MOSFET (13) comprising a switching gate electrode (5) and a field shield MOS structure (11) formed on an element isolating region of a semiconductor substrate (1) and performs the element isolation by applying a bias voltage to the field shield (9). The field shield (9) is provided on the element isolating region of the semiconductor substrate (1) through an insulating film (8). A sidewall spacer (12) having its width set such that the field shield (9) may be an offset gate is formed on the side portion of the field shield (9). Then, source and drain layers (6) are formed on the main surface of the semiconductor substrate (1) so as not to overlap with the field shield (9). According to the semiconductor device, since the field shield (9) is the offset gate, it is possible to set high the threshold value on a parasitic MOS transistor and miniaturize the elements.


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