The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 17, 1992
Filed:
Aug. 14, 1991
Applicant:
Inventors:
John H Murphy, Churchill, PA (US);
Michael R Daniel, Monroeville, PA (US);
John X Przybysz, Penn Hills, PA (US);
Assignee:
Westinghouse Electric Corp., Pittsburgh, PA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307476 ; 307306 ; 307462 ;
Abstract
Superconducting timed gate array cells for use in single-rail logic circuits are provided by adding inputs to modified variable threshold logic (MVTL) timed inverter circuits. Data signals which are inphase with a first phase of a power source are coupled to gate array cells in which Josephson junction bias current is provided by a second phase of the power source. NOR, NAND, 2NOR-OR and 2NAND-AND circuits are disclosed for use as building blocks in the production of specialized digital logic circuits.