The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1992

Filed:

Dec. 21, 1990
Applicant:
Inventors:

Jean-Pierre Bournas, Chaville, FR;

Jean-Jacques Quisquater, Bruxelles, BE;

Dominique De Waleffe, Bruxelles, BE;

Peter Klapproth, Hamburg, DE;

Assignee:

U.S. Philips Corp., New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ; G06F / ; G06F / ; G06F / ;
U.S. Cl.
CPC ...
395775 ; 364736 ; 364748 ; 3642286 ; 3642319 ; 364239 ; 3642394 ; 3642621 ; 3649263 ; 364931249 ; 3649332 ; 3649333 ; 3649468 ;
Abstract

Microcontroller comprising in particular a central processing unit (10), a set of memories (11, 12), a specialized processing module (13) for performing, in sequence, operations on v variable operands and k operands of parameter type (constant during the sequence), and an arrangement of internal buses (20, 21) for the exchange of addresses and data. The microcontroller further has a local bus (25) reserved for the transfer of data between the processing module (13) and the working memory (12), a data switching multiplexer (26) enabling the selection of data either on the local bus (25) or on the internal data bus (21), to be applied to the data port (121) of the working memory (12), as well as, interposed between the internal address bus (20) and the address port (120) of the working memory (12), an address switching multiplexer (28) and a set of pointer registers (31 to 44) of which at least a portion is arranged as queues: v queues (31-41, 32-42) for the v operands plus one queue (34, 44) for the partial results of an operation.


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Bournas, Jean-Pierre. (1992). Microcontroller for the rapid execution of a large number of operations (U.S. Patent No. 5163154). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5163154

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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