The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1992

Filed:

Apr. 11, 1991
Applicant:
Inventor:

Kosei Okamoto, Kunitachi, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395725 ; 364D / ; 3642428 ; 3642426 ; 3642421 ; 3642412 ; 3642414 ; 3642416 ;
Abstract

An interrupt control apparatus of a microprocessor comprises a controller for selecting an interrupt requirement having a highest priority from a plurality of interrupt requirements and outputting the signals indicative of this highest priority; a comparator for comparing the priority of the interrupt requirement selected by the interrupt controller with mask information indicating a priority as to whether the interrupt requirement is executed or not; a detector for detecting whether the priority of the interrupt requirement is outputted from the controller or not; and a judging device for stopping an output of the controller when the priority of the selected interrupt requirement is lower than the priority of the mask information. The judging device makes the controller further select an interrupt requirement having a highest priority from the plurality of interrupt requirements by the controller and output a signal indicative of this priority when the detector detects the stoppage of the output of the controller. The judging device instructs the execution of the selected interrupt requirement when the priority of the selected interrupt requirement is higher than or equal to the priority of the mask information.


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