The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 10, 1992

Filed:

Mar. 15, 1991
Applicant:
Inventors:

Kouju Aoki, Inazawa, JP;

Hideji Sumi, Kani, JP;

Moriaki Mizuno, Nagoya, JP;

Tetsuya Aisaka, Kasugai, JP;

Assignees:

Fujitsu Limited, Kawasaki, JP;

Fujitsu VLSI Limited, Kasugai, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307475 ; 307450 ; 3072966 ;
Abstract

A circuit has a level converting circuit for converting a signal having level in conformance with a first logic system into a signal having a level in conformance with a second logic system. The circuit includes first, second and third voltage lines for respectively supplying first, second and third power source voltages, a level converting circuit coupled to the first and third voltage lines for converting a first signal having a level in conformance with the first logic system into a second signal having a level in conformance with the second logic system, a reference voltage generating part coupled to the first and third voltage lines for generating a reference voltage based on at least the first power source voltage, so that the reference voltage undergoes a corresponding level deviation with respect to a level deviation of the second signal caused by a level deviation in the first signal which occurs due to a level deviation in the first power source voltage, and a logic circuit which employs the second logic system and is coupled to the second and third voltage lines for receiving the second signal from the level converting circuit and for outputting an output signal using the reference voltage from the reference voltage generating part as a bias signal. The first power source voltage is a positive voltage relative to the second power source voltage and the third power source voltage is a negative voltage relative to the second power source voltage.


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