The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 03, 1992

Filed:

Apr. 03, 1991
Applicant:
Inventors:

Vivek B Dutta, Cupertino, CA (US);

Jeffrey C Demmin, Mt. View, CA (US);

Mark L Diorio, Cupertino, CA (US);

Jon T Ewanich, Cupertino, CA (US);

Assignee:

National Semiconductor Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01R / ;
U.S. Cl.
CPC ...
29827 ; 174 522 ; 174 524 ;
Abstract

A package for containing an integrated circuit component is provided which includes one or more layers with exposed edges surrounding a central opening. The integrated circuit component is positioned in the central opening. Bond wires connect the bond pads of the integrated circuit component to the continuous shelves of the various stepped-back stadium-like layers as well as to individual insulated leads. The layers are spaced apart by beads or columns of insulative material and the major portion of the layers are separated from each other by a gaseous dielectric, preferably air. The R-C constant is reduced and the speed of transmission is increased by the presence of the low dielectric material providing a device which can function rapidly. The stepped portions of the layers are exposed to allow for electrical interconnections within the layers, as well as from each layer to the integrated circuit.


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