The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1992

Filed:

Apr. 25, 1991
Applicant:
Inventors:

Brian E Petted, Cedar Rapids, IA (US);

Jeffrey P Ortiz, Chandler, AZ (US);

Leo J Wilz, Cedar Rapids, IA (US);

Robert J Baeten, Chandler, AZ (US);

Assignee:

Rockwell International Corporation, Seal Beach, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307529 ; 307571 ; 3072961 ; 3072964 ; 3072966 ; 3072968 ; 455326 ;
Abstract

A biasing network for use in conjunction with a mixer employing field effect transistors which provides for minimum conversion loss over a range of process and temperature conditions. The biasing circuit includes a first field effect transistor having a small gate periphery which is configured as a current source, a second or reference field effect transistor having a gate periphery substantially equal to the gate peripheries of the transistors in the mixer to which the biasing circuit is providing DC biasing voltages and a voltage divider which is functional in defining operating conditions for the reference transistor.


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