The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 06, 1992

Filed:

Jun. 15, 1988
Applicant:
Inventors:

Yong E Park, Seoul, KR;

Soo I Cho, Seoul, KR;

Dong S Jun, Daigu, KR;

Seung M Seo, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ; H03K / ; G11C / ;
U.S. Cl.
CPC ...
307452 ; 307242 ; 307582 ; 307443 ; 365190 ; 36518905 ; 365203 ;
Abstract

An improved data transmission circuit for complementary metal oxide semiconductor (CMOS) dynamic random access memory devices having a data input buffer for converting transistor-transistor logic (TTL) input data signals to CMOS logic level true and complement data signals is described. The data transmission circuit includes a pair of transmission gates for transferring the true and complement data signals in a write cycle, a pair of inverting stages connected between respective ones of the transmission gates and true and complement input/output (I/O) bus lines for inverting data signals from the transmission gates to provide the inverted data signals to true and complement I/O bus lines in the write cycle and an equalizing stage for precharging and equalizing true and complement I/O bus lines in a precharge cycle. The data transmission circuit is characterized in that each of the inverting stages can operate under the control of a block selecting clock signal regardless of the precharging voltages of the true and complement I/O bus lines.


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