The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 22, 1992
Filed:
May. 03, 1991
Grzegorz B Zyner, Sunnyvale, CA (US);
Sun Microsystems, Inc., Mountain View, CA (US);
Abstract
A rounding circuit for a binary tree floating point multiplier including apparatus for providing the upper bits of a mantissa presuming that no carry-in has occurred without waiting for the generation of a carry-in from lower order bits, apparatus for providing the upper bits of a mantissa presuming that a carry-in has occurred without waiting for the generation of a carry-in from lower order bits; apparatus for providing a first set of lower order bits for the mantissa based on an actual carry-in from a lower order bit adder and a rounding condition, the first set of lower order bits for the mantissa being chose for no mantissa overflow; apparatus for providing a second set of lower order bits for the mantissa based on an actual carry-in from a lower order bit adder and a rounding condition, the second set of lower order bits for the mantissa being chosen for mantissa overflow; and apparatus for selecting upper order bits and lower order bits for the mantissa based on whether a carry-in propagates past the lower order bits of the mantissa and whether a mantissa overflow has occurred.