Dram with split word lines

Abstract

In a dynamic random access memory comprising first and second memory cell arrays, and a plurality of word lines, each split into two sections extending through the first and the second memory cell arrays, respectively, word line drive circuits are divided into three blocks. The first block is disposed between the inner sides of the memory cell arrays and connected to the inner ends of the alternate word line sections. The second and the third blocks are disposed adjacent to the outer sides of the memory cell arrays and are connected to the outer ends of the intervening word line sections. Because the word line drive circuits for the respective word lines are disposed on both sides of each memory cell array, alternately, the area for the word line drive circuit for each word line can extend twice the pitch of the word lines. Thus, the pitch of the word lines can be reduced, or the size of the word line drive transistors can be increased, enabling a higher degree of integration.