Signal processing integrated circuit

Abstract

A signal processing large scale integrated circuit for carrying out convolution calculations includes multiple delay stages serially connected to thereby form an input data path for a first input signal, a first calculation circuit wherein predetermined calculations are carried out using the output of each of the above mentioned delay stages and a second calculation circuit connected to a convolution path wherein predetermined calculations are carried out using the output of the above mentioned first calculation circuit and a second input signal output from another large scale integrated circuit. The problem of a prolonged delay when multiple LSI circuits are cascade-connected together is eliminated by outputting the first output signal from an intermediate delay element and supplying it as the input to the next stage large scale integrated circuit. Additionally, the direction of the input data path and the convolution path are reverse with respect to one another, so that the value calculated in the first calculation circuit in the first circuit is calculated using the output from the following stage circuit. As a result, the total delay of the cascade-connected circuits is equivalent to the delay of the first circuit in the cascade.