The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 15, 1992

Filed:

Mar. 27, 1991
Applicant:
Inventors:

Kevin W Glass, San Jose, CA (US);

Ashok Nagarajan, Fremont, CA (US);

Assignee:

MOS Electronics Corp., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307443 ; 307572 ;
Abstract

An output buffer circuit is disclosed that has optimized ground bounce characteristics while maintaining low propagation delay. The output buffer may be incorporated within an integrated circuit and may be embodied in either inverting or non-inverting and in either enabling and non-enabling configurations. The output buffer circuit includes a feedback means coupled to the output terminal of the output buffer and to a pull-down transistor. The feedback means provides a feedback voltage to the gate of the pull-down transistor to regulate the derivative of source current with respect to time. The feedback means includes a pair of field effect transistors and either an inverter gate or a NOR gate coupled across one of the feedback field effect transistors.


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