The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 1992

Filed:

Dec. 30, 1988
Applicant:
Inventor:

Robert Francisco, New Fairfield, CT (US);

Assignee:

Pitney Bowes Inc., Stamford, CT (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
395575 ; 3642293 ; 3642843 ; 364285 ; 3642861 ; 364D / ;
Abstract

In a material processing system comprising a plurality of material processing stations, a base material processing station, and structure directing material to be processed serially through the plurality of stations in a given order to the base station; the improvement wherein each of the plurality of stations and the base station comprises a separate data and control processor, and further comprising a communication loop interconnecting the processors of the plurality of stations in the given order to the processor of the base station and interconnecting the processor of the base station to the processor of the first of the plurality of stations. Each of the processors of the plurality of stations comprises structure for generating an error message concerning a respective station, and structure for passing the error message generated therein to the next succeeding station in the communication loop, wherein each of the processors generates the error message by selecting an appropriate one of a plurality of messages stored in memory locations associated with each the processor. Each of the plurality of messages exists simultaneously in a plurality of spoken languages in the memory locations. The processors include structure for selecting the error messages in one of the languages. The base station includes a display, and the processor of the base station comprises means for displaying the error message received thereby on the display.


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