The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 1992

Filed:

Apr. 29, 1991
Applicant:
Inventor:

Lionel J D'Luna, Rochester, NY (US);

Assignee:

Eastman Kodak Company, Rochester, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
36518902 ; 365194 ; 36518912 ; 340800 ; 340802 ;
Abstract

A digital line delay architecture is provided that requires a minimum of chip space, has low power requirements, is variable or programmable in length, and is flexible to permit changes in aspect ratio. The digital line delay architecture is self-multiplexing and therefore requires no external addressing for the multiplexing function, and is particularly suited for use as a video line delay in a single chip digital image processing device. In particular, a pointer unit is employed to sequentially address a plurality of word storage locations provided in a storage unit. The pointer unit includes a number of shift-registers that sqeuentially shift a logic '1' along the length of the pointer unit to accomplish the addressing.


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