Structure of input protection transistor in semiconductor device

Abstract

Disclosed is a structure of a semiconductor device in which an internal circuit including a memory device and a transistor having an LDD structure, and an input protection device for protecting the internal circuit are formed on one semiconductor substrate, and a method of manufacturing such a semiconductor device. The input protection device and the memory device are formed at the same time. The input protection device as well as the memory device includes source/drain regions formed of high concentration impurity regions and formed in the surface of the semiconductor substrate, and a gate electrode formed of a plurality of conductor films and formed on the surface of the semiconductor substrate between the source/drain regions. When an abnormal voltage is applied to an interconnection for supplying an electrical signal to the internal circuit, a charge flows from the interconnection through one source/drain region of the input protection device into the semiconductor substrate, so that the internal circuit is protected against an excessive charge.