The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 1992

Filed:

Apr. 17, 1991
Applicant:
Inventors:

Hang M Liaw, Scottsdale, AZ (US);

Frank S d'Aragona, Scottsdale, AZ (US);

Raymond M Roop, Scottsdale, AZ (US);

Dennis R Olsen, Scottsdale, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
437 62 ; 148D / ; 437 86 ; 437974 ;
Abstract

A method of fabricating a low voltage, deep junction semiconductor device includes providing first and second wafers of opposite conductivity types, each having a dopant concentration of at least 4.0.times.10.sup.16 atoms/cc. After cleaning the wafers and removing heavy metal impurities therefrom by gettering, the wafers are bonded together. This method results in the successful fabrication of semiconductor devices having a junction depth in the range of 20 to 500 microns and a breakdown voltage of less than 20 volts.


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Liaw, Hang. (1992). Low voltage, deep junction device and method (U.S. Patent No. 5141887). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5141887

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