Gaas integrated circuit programmable delay line element

Abstract

A semiconductor chip for processing or storing information and a system comprising a plurality of semiconductor chips for processing or storing information. In one form of the invention each chip includes clock input and output circuitry for receiving and transmitting signals of a first frequency and transmission circuitry for receiving and transmitting data. The transmission circuitry is capable of sampling the data at a second clock frequency which is less than the first clock frequency. Circuit components are coupled to the clock circuitry and transmission circuitry for processing the data. In another form of the invention a semiconductor chip comprising clock input and output circuitry, transmission circuitry and circuit components for processing data further includes input circuitry for selecting a variable delay between the time data is received onto the chip and transmitted from the chip In a preferred embodiment of the invention the semiconductor chip includes a memory array for storing data. The transmission circuitry includes a first path for transmitting received data to another like chip and a transmission path capable of combining data which is stored in the memory array with data which is stored in one or more like chips.