The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 18, 1992
Filed:
Jun. 29, 1989
Katsuyoshi Suzuki, Hadano, JP;
Hachidai Nagase, Hadano, JP;
Tetsuo Sasaki, Hadano, JP;
Yousuke Nagao, Hadano, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
A method and a system for assisting mending of an LSI after it has been formed into a chip which is necessitated by modification of logic etc. The mending includes corrections by connecting or cutting interconnections of the LSI. The assisting method and system provides a method and a system for detecting which interconnection or connections should be subjected to mending according to the logic modification, or a method and a system for detecting an area or areas where the intended mending can be carried out, or a method and a system for advising a mending-allowable rate of the LSI. This invention further provides a wiring structure suited for mending of the LSI and a wiring method for the same. By this method, a wiring structure which preliminarily has a mending area in preparation for possible modification in logic is produced.