The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 1992

Filed:

Feb. 20, 1991
Applicant:
Inventors:

Gerard Barucchi, La Gaude, FR;

Jean Calvignac, La Gaude, FR;

Jose Galcera, Le Broc, FR;

Gilles Toubol, Villeneuve Loubet, FR;

Andre Tracol, Villeneuve Loubet, FR;

Daniel Orsatti, Cagnes sur Mer, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L / ;
U.S. Cl.
CPC ...
375106 ; 3701051 ;
Abstract

The synchronization circuit resynchronizes the data bits received from remote devices on line or link (20-1) with their own clock CS and frame synchronization signal FS with a central clock CO and central frame synchronization signal FO. The received bits are sequentially arranged in an n-bit cyclic buffer (114-1) with the received bit clock CS. The arranged bits are sequentially picked at the opposite buffer position with the central clock CO. The buffer loading position is provided by binary counter 102 incremented by CS and the buffer picking portion is given by binary counter 100 incremented by CO. At initialization counters 102 and 100 are set to 0 and n/2. The resynchronized data bits on line 21-1 and the resynchronized frame signal FSR on line 61-10 are provided to an additional circuit which synchronize the data bits at the frame level.


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